The present invention relates to a plasma display panel and more particularly to a direct current plasma display panel having a low discharge sustaining voltage.
As shown in FIG. 1, in a known direct current plasma display panel (hereinafter referred to as a PDP), a plurality of parallel anodes A and parallel cathodes K are arranged on, inner surfaces of two parallel plates 1 and 2 respectively. Barrier ribs B of a predetermined height are provided between anodes A on the upper plate to prevent a cross-talk. When plates 1 and 2 are positioned, anodes A and cathodes K are perpendicular to each other. In such a PDP the anodes A and the cathodes K are exposed to the inner space; which is filled with a discharge gas, so that a direct current discharge occurs between cathodes K on the lower plate and anodes A on the upper plate, i.e., at each pixel, due to the direct current voltage individually applied to the matrix of cathodes and anodes.
One disadvantage of this conventional PDP is the relatively large volume of the barrier rib, as compared to the volume of each discharge portion. Large energy losses occur as a result of this condition. In a PDP of high density and high resolution, the pixel size becomes extremely small. However, decreasing the size of the barrier rib is not practical, thereby enhancing large energy losses in PDP's of high density and high resolution. As a result, in the conventional PDP, the required discharge maintaining voltage is high, thereby, undesireably, increasing the consumed power.